WEBINAR #07: PACKAGING – THE NEW GAME DEFINING THE FUTURE OF THE SEMICONDUCTOR INDUSTRY

When “Back-End Technology” Becomes a Strategic Frontline in the AI & HPC Era

As the global semiconductor industry enters a profound transition, long-established assumptions are being re-examined. For decades, performance gains were driven primarily by transistor scaling under Moore’s Law. Today, however, as physical limits, rising costs, and technical complexity challenge further miniaturization, a new strategic frontier has emerged: semiconductor packaging and integration.

Continuing the “Decoding Semiconductors” webinar series, Webinar #07: “PACKAGING – The New Game Defining the Future of the Semiconductor Industry,” organized by the VISEMI Foundation, focuses on a domain once considered “behind the scenes,” yet now central to innovation in artificial intelligence (AI), high-performance computing (HPC), and next-generation electronic systems.

Why Semiconductor Packaging Has Become a Strategic Priority

For many years, the semiconductor roadmap was dominated by front-end fabrication. However, as scaling becomes increasingly constrained, industry progress now depends heavily on how chips are connected, stacked, integrated, and cooled within a package measuring only a few square centimeters.

Modern chip performance is no longer determined by silicon alone. Instead, it is shaped by advanced packaging technologies such as wafer-level packaging, fan-out packaging, 2.5D/3D integration, chiplet architectures, and heterogeneous integration. These approaches enable higher bandwidth, lower power consumption, improved thermal management, and more flexible system design.

As a result, packaging has evolved from a supporting role into a decisive factor in semiconductor competitiveness. It is also widely regarded as one of the most realistic entry points for emerging economies—including Vietnam—to participate more deeply in the global semiconductor value chain.

Key Highlights of Webinar #07

1. The Global Semiconductor Landscape and Technology Trends

The webinar opens with a keynote address by Ms. Bich-Yen Nguyen, IEEE Fellow, Chairwoman of VSAP Lab, and Senior Advisor to Soitec (France). Drawing on decades of international experience, she provides a comprehensive overview of the global semiconductor industry and explains why advanced packaging is becoming a new focal point of technological competition.

2. The Evolution and Role of Semiconductor Packaging

Participants will revisit the historical development of packaging technologies and gain insight into how packaging has consistently co-evolved with chip design. The session highlights why chip design and packaging can no longer be treated as separate disciplines in modern semiconductor development.

3. Packaging Technologies and Applications

This segment presents a structured overview of current packaging technologies, analyzing their technical characteristics, advantages and limitations, cost considerations, and application domains. The discussion aims to equip attendees with a clear and practical understanding of how different packaging approaches are deployed across industries.

4. From Design to Manufacturing: Developing Packaging Technologies

Through real-world examples—such as wafer-level packaging—speakers share insights into the end-to-end development journey of packaging technologies, from design and simulation to process integration and manufacturing. The session underscores the tight coupling between design, process engineering, and production.

5. The Rising Importance of Advanced Packaging in AI and HPC

AI workloads and HPC systems place unprecedented demands on bandwidth, power efficiency, and thermal performance. This session examines how these requirements are driving innovation in advanced packaging, as well as the technical challenges associated with high-density integration and system reliability.

6. Open Discussion: Vietnam’s Opportunities in Semiconductor Packaging

In a concluding panel discussion, speakers explore Vietnam’s potential role in the packaging segment of the semiconductor value chain, addressing workforce development, industry participation, and career pathways for students and young engineers.

Throughout the webinar, participants will have opportunities to interact directly with the speakers and ask questions, covering topics ranging from education and technology to professional development.

VSAP Lab: Bridging Knowledge and Practice in Advanced Packaging

As a key technical contributor to Webinar #07, VSAP Lab (Vietnam Semiconductor Advanced Packaging Lab-Fab) represents an emerging pillar of Vietnam’s semiconductor ecosystem.

VSAP Lab is being developed as Vietnam’s first Lab-Fab model dedicated to advanced semiconductor packaging, following a philosophy of:

Developing technology in the Lab, building and validating prototypes in the Fab, and transferring knowledge and capabilities to the broader ecosystem.

With a focus on system-in-package (SiP), fan-out packaging, 2.5D/3D integration, chiplets, and heterogeneous integration, VSAP Lab aims to:

  • Support R&D and prototyping for enterprises, startups, and research institutions
  • Provide hands-on training aligned with real industrial technologies
  • Connect Vietnam’s talent base with global advanced packaging networks

The official inauguration of VSAP Lab is scheduled for mid-2026, marking an important milestone in Vietnam’s efforts to build core technological capabilities in semiconductor packaging and to align human-capital development with national semiconductor strategies.

Webinar Information

WEBINAR #07: PACKAGING – THE NEW GAME DEFINING THE FUTURE OF THE SEMICONDUCTOR INDUSTRY

🕘 Time: 09:00–11:00 (Vietnam Time), Sunday, February 1, 2026
📍 Format: Live streaming on Visemi Foundation’s YouTube and Facebook platforms

Guest Speakers:

  • Ms. Bich-Yen Nguyen – IEEE Fellow, Chairwoman, VSAP Lab; Senior Advisor, Soitec (France)
  • Mr. Bao-Anh Nguyen – CEO, VSAP Lab (Vietnam)
  • Mr. Hai-Au Huynh – Technical Director, VSAP Lab
  • Mr. Hoang-Hai Phan – R&D Engineer, Qualcomm (Germany)
  • Mr. Minh-Tien Duong – R&D Engineer, Samsung (Korea)
  • Mr. Cong Trinh – Technical Manager, Applied Materials (United States)

🎓 Participant Benefits:

  • Updates on key technology trends in advanced packaging
  • Direct interaction with international industry experts
  • Opportunities to join 1:1 mentoring programs and receive scholarships from the VISEMI Foundation

👉 Register now: https://tinyurl.com/VISEMI07

Webinar #07 is not only a platform for knowledge sharing, but also an invitation to rethink Vietnam’s position in the global semiconductor landscape—and to take part in shaping the industry’s future through advanced packaging.

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